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Xilinx, Inc Patent Portfolio Statistics

Xilinx, Inc

Xilinx, Inc`s Profile

This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.

How does the overall patent portfolio of Xilinx, Inc look like?

Total Applications: 4
Granted Patents: 4
Grant Index 100.0 %
Abandoned/Rejected Applications: 0 (0.0%)
In-Process Applications: 0
Average Grant Time: 2.6 Years
Average Office Actions: 1.0

Which Technology Area Xilinx, Inc is filing most patents in? (Last 10 years)

Art Unit Definition Total Applications
2816 Semiconductors/Memory 1
2817 Semiconductors/Memory 1
2819 Semiconductors/Memory 1
2829 Semiconductors/Memory 1

How many patents are Xilinx, Inc filing every year?

Year Total Applications
2022 0*
2021 0*
2020 0
2019 0
2018 0

*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published

Recently filed patent applications of Xilinx, Inc in USPTO?

Publication number: US20220027273A1

A network interface device comprises a programmable interface configured to provide a device interface with at least one bus between the network interface device and a host device. The programmable interface is programmable to support a plurality of different types of a device interface.

Publication date: 2022-01-27
Applicant: Xilinx, Inc
Inventors: Dmitri Kitariev

Publication number: US20220015588A1

Examples herein describe techniques for communicating between data processing engines in an array of data processing engines. In one embodiment, the array is a 2D array where each of the DPEs includes one or more cores. In addition to the cores, the data processing engines can include streaming interconnects which transmit streaming data using two different modes: circuit switching and packet switching. Circuit switching establishes reserved point-to-point communication paths between endpoints in the interconnect which routes data in a deterministic manner. Packet switching, in contrast, transmits streaming data that includes headers for routing data within the interconnect in a non-deterministic manner. In one embodiment, the streaming interconnects can have one or more ports configured to perform circuit switching and one or more ports configured to perform packet switching.

Publication date: 2022-01-20
Applicant: Xilinx, Inc
Inventors: J Juan Noguera Serra

Publication number: US20210281499A1

A network interface device, said network interface device has a data transmission path configured to receive data for transmission. The data for transmission is to be sent over a network by the network interface device. A monitor is configured to monitor the data transmission path to determine if an underrun condition is associated with the data transmission path. If so, an indication is included in the transmitted data packet.

Publication date: 2021-09-09
Applicant: Xilinx, Inc
Inventors: L Pope Steven

How are Xilinx, Inc’s applications performing in USPTO?

Application Number Title Status Art Unit Examiner
17493694 Network Interface Device Supporting Multiple Interface Instances To A Common Bus OPAP Central, Docket
17468346 Dual Mode Interconnect OPAP Central, Docket
17328941 Network Interface Device Docketed New Case – Ready for Examination OPAP Central, Docket
17308871 Programmed Input/Output Mode Docketed New Case – Ready for Examination 2454 Chang, Jungwon
17246310 Network Interface Device Docketed New Case – Ready for Examination OPAP Central, Docket