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Sk Hynix Inc Patent Portfolio Statistics

Sk Hynix Inc

Sk Hynix Inc`s Profile

This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.

How does the overall patent portfolio of Sk Hynix Inc look like?

Total Applications: 84
Granted Patents: 83
Grant Index 100.0 %
Abandoned/Rejected Applications: 0 (0.0%)
In-Process Applications: 1
Average Grant Time: 2.08 Years
Average Office Actions: 1.07

Which Technology Area Sk Hynix Inc is filing most patents in? (Last 10 years)

Art Unit Definition Total Applications
2818 Semiconductors/Memory 11
2824 Semiconductors/Memory 9
2827 Semiconductors/Memory 9
2814 Semiconductors/Memory 7
2816 Semiconductors/Memory 6

How many patents are Sk Hynix Inc filing every year?

Year Total Applications
2022 0*
2021 0*
2020 1
2019 0
2018 0

*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published

Recently filed patent applications of Sk Hynix Inc in USPTO?

Publication number: US20210089208A1

A memory system includes a storage medium including a plurality of nonvolatile memory devices grouped into a plurality of groups and a controller configured to manage the storage medium by a unit of a zone block, the controller selecting one nonvolatile memory device from each of the groups and configuring the zone block over the selected nonvolatile memory devices.

Publication date: 2021-03-25
Applicant: Sk Hynix Inc
Inventors: Jeon Seung Won

Publication number: US20170154662A1

This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory, and the semiconductor memory may include: an under layer including a plurality of material layers having a different crystal structures; a first magnetic layer formed over the under layer and having a variable magnetization direction; a tunnel barrier layer formed over the first magnetic layer; and a second magnetic layer formed over the tunnel barrier layer and having a pinned magnetization direction.

Publication date: 2017-06-01
Applicant: Sk Hynix Inc
Inventors: Jung Ku-Youl

Publication number: US20160276036A1

Methods of determining distributions may include performing a number of hard reads, performing a number of background reads at a frequency based on the number of hard reads, and estimating a conditional probability density of a cell voltage based on the hard reads and the background reads.

Publication date: 2016-09-22
Applicant: Sk Hynix Inc
Inventors: David J Pignatelli

How are Sk Hynix Inc’s applications performing in USPTO?

Application Number Title Status Art Unit Examiner
16877239 Memory System And Data Processing System Including Zone Blocks Advisory Action Mailed 2139 Mackall, Larry T
15073394 Electronic Device Patented Case 2824 Bernstein, Allison
15073286 System Optimization In Flash Memories Patented Case 2824 Byrne, Harry W
15071986 Memory Controller And Operating Method Thereof Patented Case 2824 Yang, Han
15007996 Generating Soft Read Values Using Multiple Reads And/Or Bins Patented Case 2827 Mai, Son Luu