Xilinx, Inc Patent Portfolio Statistics

Xilinx, Inc.

Profile Summary

This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.

How does the overall patent portfolio of Xilinx, Inc. look like?

Total Applications: 4,523
Granted Patents: 4,408
Grant Index 98.97 %
Abandoned/Rejected Applications: 46 (1.03%)
In-Process Applications: 64
Average Grant Time: 2.63 Years
Average Office Actions: 1.4

Which Technology Area Xilinx, Inc. is filing most patents in? (Last 10 years)

Art Unit Definition Total Applications
2819 Semiconductors/Memory 581
2825 Semiconductors/Memory 542
2851 Printing/Measuring and Testing 240
2816 Semiconductors/Memory 210
2842 Electrical Circuits and Systems 123

How many patents are Xilinx, Inc. filing every year?

Year Total Applications
2022 0*
2021 15*
2020 109
2019 202
2018 227

*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published

Recently filed patent applications of Xilinx, Inc. in USPTO?

Publication number: US20220027273A1
Application number: 17/493,694

Abstract:
A network interface device comprises a programmable interface configured to provide a device interface with at least one bus between the network interface device and a host device. The programmable interface is programmable to support a plurality of different types of a device interface.

Publication date: 2022-01-27
Applicant: Xilinx, Inc.
Inventors: David J Riddoch


Publication number: US20220015588A1
Application number: 17/468,346

Abstract:
Examples herein describe techniques for communicating between data processing engines in an array of data processing engines. In one embodiment, the array is a 2D array where each of the DPEs includes one or more cores. In addition to the cores, the data processing engines can include streaming interconnects which transmit streaming data using two different modes: circuit switching and packet switching. Circuit switching establishes reserved point-to-point communication paths between endpoints in the interconnect which routes data in a deterministic manner. Packet switching, in contrast, transmits streaming data that includes headers for routing data within the interconnect in a non-deterministic manner. In one embodiment, the streaming interconnects can have one or more ports configured to perform circuit switching and one or more ports configured to perform packet switching.

Publication date: 2022-01-20
Applicant: Xilinx, Inc.
Inventors: Baris Ozgul


Publication number: US20210281499A1
Application number: 17/328,941

Abstract:
A network interface device, said network interface device has a data transmission path configured to receive data for transmission. The data for transmission is to be sent over a network by the network interface device. A monitor is configured to monitor the data transmission path to determine if an underrun condition is associated with the data transmission path. If so, an indication is included in the transmitted data packet.

Publication date: 2021-09-09
Applicant: Xilinx, Inc.
Inventors: David J Riddoch


How are Xilinx, Inc.’s applications performing in USPTO?

Application Number Title Status Art Unit Examiner
17/493,694 Network Interface Device Supporting Multiple Interface Instances To A Common Bus OPAP Central, Docket
17/468,346 Dual Mode Interconnect OPAP Central, Docket
17/328,941 Network Interface Device Docketed New Case – Ready for Examination OPAP Central, Docket
17/308,871 Programmed Input/Output Mode Docketed New Case – Ready for Examination 2454 Chang, Jungwon
17/246,310 Network Interface Device Docketed New Case – Ready for Examination OPAP Central, Docket