United Microelectronics Corp Patent Portfolio Statistics

United Microelectronics Corp.

Profile Summary

This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.

How does the overall patent portfolio of United Microelectronics Corp. look like?

Total Applications: 6,323
Granted Patents: 4,981
Grant Index 81.07 %
Abandoned/Rejected Applications: 1,163 (18.93%)
In-Process Applications: 173
Average Grant Time: 2.02 Years
Average Office Actions: 1.33

Which Technology Area United Microelectronics Corp. is filing most patents in? (Last 10 years)

Art Unit Definition Total Applications
2812 Semiconductors/Memory 510
2813 Semiconductors/Memory 451
2818 Semiconductors/Memory 442
2823 Semiconductors/Memory 365
2822 Semiconductors/Memory 345

How many patents are United Microelectronics Corp. filing every year?

Year Total Applications
2022 0*
2021 22*
2020 162
2019 178
2018 302

*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published

Recently filed patent applications of United Microelectronics Corp. in USPTO?

Publication number: US20220028787A1
Application number: 17/493,852

Abstract:
A semiconductor device including a substrate having a NMOS region and a PMOS region; a metal gate extending continuously along a first direction from the NMOS region to the PMOS region on the substrate; a first source/drain region extending along a second direction adjacent to two sides of the metal gate on the NMOS region; a second source/drain region extending along the second direction adjacent to two sides of the metal gate on the PMOS region; a first contact plug landing on the second source/drain region adjacent to one side of the metal gate; a second contact plug landing on the second source/drain region adjacent to another side of the metal gate; and a third contact plug landing directly on a portion of the metal gate on the PMOS region and between the first contact plug and the second contact plug.

Publication date: 2022-01-27
Applicant: United Microelectronics Corp.
Inventors: Chen Shih-Cheng


Publication number: US20220020745A1
Application number: 17/492,687

Abstract:
A semiconductor device includes a PMOS region and a NMOS region on a substrate, a first fin-shaped structure on the PMOS region, a first single diffusion break (SDB) structure in the first fin-shaped structure, a first gate structure on the first SDB structure, and a second gate structure on the first fin-shaped structure. Preferably, the first gate structure and the second gate structure are of different materials and the first gate structure disposed directly on top of the first SDB structure is a polysilicon gate while the second gate structure disposed on the first fin-shaped structure is a metal gate in the PMOS region.

Publication date: 2022-01-20
Applicant: United Microelectronics Corp.
Inventors: Cheng-Tung Huang


Publication number: US20220013718A1
Application number: 17/483,790

Abstract:
A multi-bit resistive random access memory cell includes a plurality of bottom electrodes, a plurality of dielectric layers, a top electrode and a resistance layer. The bottom electrodes and the dielectric layers are interleaved layers, each of the bottom electrodes is sandwiched by the dielectric layers, and a through hole penetrates through the interleaved layers. The top electrode is disposed in the through hole. The resistance layer is disposed on a sidewall of the through hole and is between the top electrode and the interleaved layers, thereby the top electrode, the resistance layer and the bottom electrodes constituting a multi-bit resistive random access memory cell. The present invention also provides a method of forming the multi-bit resistive random access memory cell.

Publication date: 2022-01-13
Applicant: United Microelectronics Corp.
Inventors: Po-Yu Yang


How are United Microelectronics Corp.’s applications performing in USPTO?

Application Number Title Status Art Unit Examiner
17/493,852 Semiconductor Device Having Contact Plug Connected To Gate Structure On Pmos Region OPAP Central, Docket
17/492,687 Semiconductor Device And Method For Fabricating The Same OPAP Central, Docket
17/483,790 Method Of Forming Multi-Bit Resistive Random Access Memory Cell OPAP Central, Docket
17/481,300 Method Of Forming Semiconductor Device Docketed New Case – Ready for Examination OPAP Central, Docket
17/476,461 Manufacturing Method Of Semiconductor Device Docketed New Case – Ready for Examination OPAP Central, Docket