Texas Instruments Incorporated Patent Portfolio Statistics

Texas Instruments Incorporated

Profile Summary

This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.

How does the overall patent portfolio of Texas Instruments Incorporated look like?

Assignee Art Units
Total Applications: 16,864 2,146,457
Granted Patents: 13,551 1,451,609
Grant Index 84.04% 81.89%
Abandoned/Rejected Applications: 2,574 (15.96%) 320,955 (18.11%)
In-Process Applications: 728 373,893
Average Grant Time: 2.84 Years 2.65 Years
Average Office Actions: 1.43 1.46

Which Technology Area Texas Instruments Incorporated is filing most patents in? (Last 10 years)

Art Unit Definition Total Applications
2838 Electrical Circuits and Systems 720
2816 Semiconductors/Memory 629
2842 Electrical Circuits and Systems 582
2819 Semiconductors/Memory 575
2817 Semiconductors/Memory 445

How many patents are Texas Instruments Incorporated filing every year?

Year Total Applications Predicted
2022 0* 797
2021 97* 813
2020 402 730
2019 644 644
2018 640
2017 569
2016 596
2015 599
2014 738
2013 633

*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published

Recently filed patent applications of Texas Instruments Incorporated in USPTO?

Publication number: US20220091919A1
Application number: 17/543,827

Abstract:
A circuit includes a dynamic core data register (DCDR) cell that includes a data register, a shift register and an output circuit to route the output state of the data register or the shift register to an output of the DCDR in response to an output control input. A clock gate having a gate control input controls clocking of the shift register in response to a first scan enable signal. An output control gate controls the output control input of the output circuit and controls which outputs from the data register or the shift register are transferred to the output of the output circuit in response to a second scan enable signal. The first scan enable signal and the second scan enable signal to enable a state transition of the shift register at the output of the DCDR.

Publication date: 2022-03-24
Applicant: Texas Instruments Incorporated
Inventors: Pradeep Wilson


Publication number: US20220094921A1
Application number: 17/543,767

Abstract:
A method for in-loop filtering in a video encoder is provided that includes determining filter parameters for each filtering region of a plurality of filtering regions of a reconstructed picture, applying in-loop filtering to each filtering region according to the filter parameters determined for the filtering region, and signaling the filter parameters for each filtering region in an encoded video bit stream, wherein the filter parameters for each filtering region are signaled after encoded data of a final largest coding unit (LCU) in the filtering region, wherein the in-loop filtering is selected from a group consisting of adaptive loop filtering and sample adaptive offset filtering.

Publication date: 2022-03-24
Applicant: Texas Instruments Incorporated
Inventors: Sze Vivienne


Publication number: US20220092767A1
Application number: 17/544,896

Abstract:
An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.

Publication date: 2022-03-24
Applicant: Texas Instruments Incorporated
Inventors: Alok Kumar Lohia


How are Texas Instruments Incorporated’s applications performing in USPTO?

Application Number Title Status Art Unit Examiner
17/543,827 Delay Fault Testing Of Pseudo Static Controls Docketed New Case – Ready for Examination OPAP Central, Docket
17/543,767 Flexible Region Based Sample Adaptive Offset (Sao) And Adaptive Loop Filter (Alf) Docketed New Case – Ready for Examination OPAP Central, Docket
17/544,896 Exposed Pad Integrated Circuit Package Docketed New Case – Ready for Examination OPAP Central, Docket
17/543,183 Multi-Threading In A Video Hardware Engine Docketed New Case – Ready for Examination OPAP Central, Docket
17/541,776 Static Power Reduction In Caches Using Deterministic Naps Docketed New Case – Ready for Examination OPAP Central, Docket