Micron Technology, Inc Patent Portfolio Statistics
Profile Summary
This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.
How does the overall patent portfolio of Micron Technology, Inc. look like?
Total Applications: | 32,307 |
Granted Patents: | 29,233 |
Grant Index | 96.66 % |
Abandoned/Rejected Applications: | 1,009 (3.34%) |
In-Process Applications: | 1,959 |
Average Grant Time: | 2.44 Years |
Average Office Actions: | 1.64 |
Which Technology Area Micron Technology, Inc. is filing most patents in? (Last 10 years)
Art Unit | Definition | Total Applications |
2824 | Semiconductors/Memory | 2,838 |
2827 | Semiconductors/Memory | 2,629 |
2818 | Semiconductors/Memory | 2,253 |
2812 | Semiconductors/Memory | 1,017 |
2813 | Semiconductors/Memory | 952 |
How many patents are Micron Technology, Inc. filing every year?
Year | Total Applications |
2022 | 0* |
2021 | 684* |
2020 | 1,444 |
2019 | 1,560 |
2018 | 1,827 |
*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published
Recently filed patent applications of Micron Technology, Inc. in USPTO?
Application number: 17/498,842
Abstract:
Publication date: 2022-01-27
Applicant: Micron Technology, Inc.
Inventors: Kale Poorna
Publication number: US20220027062A1
Application number: 17/450,653
Abstract:
Publication date: 2022-01-27
Applicant: Micron Technology, Inc.
Inventors: Kishore Kumar Muchherla
Publication number: US20220028733A1
Application number: 17/499,316
Abstract:
Publication date: 2022-01-27
Applicant: Micron Technology, Inc.
Inventors: Kurapati Murthy Satyanarayana Venkata
How are Micron Technology, Inc.’s applications performing in USPTO?
Application Number | Title | Status | Art Unit | Examiner |
17/498,842 | Background Operation Selection Based On Host Idle Time | – | OPAP | Central, Docket |
17/450,653 | Relocating Data To Low Latency Memory | – | OPAP | Central, Docket |
17/499,316 | Memory Arrays And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells | – | OPAP | Central, Docket |
17/498,637 | Sensor Fusion To Determine Reliability Of Autonomous Vehicle Operation | – | OPAP | Central, Docket |
17/498,468 | Semiconductor Constructions, Memory Arrays, Electronic Systems, And Methods Of Forming Semiconductor Constructions | – | OPAP | Central, Docket |