Macronix International Co., Ltd Patent Portfolio Statistics

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Macronix International Co., Ltd.

Profile Summary

This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.

How does the overall patent portfolio of Macronix International Co., Ltd. look like?

Assignee Art Units
Total Applications: 3,264 2,042,887
Granted Patents: 2,630 1,345,871
Grant Index 83.95% ↑ 80.42%
Abandoned/Rejected Applications: 503 (16.05%) 327,589 (19.58%)
In-Process Applications: 126 369,427
Average Grant Time: 2.34 Years ↓ 2.59 Years
Average Office Actions: 1.39 ↓ 1.49

Which Technology Area Macronix International Co., Ltd. is filing most patents in? (Last 10 years)

Art Unit Definition Total Applications
2824 Semiconductors/Memory 381
2827 Semiconductors/Memory 381
2818 Semiconductors/Memory 274
2813 Semiconductors/Memory 132
2825 Semiconductors/Memory 114

How many patents are Macronix International Co., Ltd. filing every year?

Year Total Applications Predicted
2022 0* 442
2021 20* 383
2020 108 437
2019 114 114
2018 83 –
2017 123 –
2016 85 –
2015 189 –
2014 211 –
2013 147 –

*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published

Recently filed patent applications of Macronix International Co., Ltd. in USPTO?

Publication number: US20180331284A1
Application number: 15/590,014

Abstract:
A memory access device that includes a first terminal with a first terminal workfunction and a chalcogenide-based selector layer with a first surface and a second surface opposite the first surface. A first control metal layer is positioned in physical and electrical contact with the first terminal and the first surface of the chalcogenide-based selector layer. The first control metal layer includes a first control workfunction different than the first terminal workfunction. A second terminal with a second terminal workfunction is positioned proximate the second surface of the chalcogenide-based selector layer.

Publication date: 2018-11-15
Applicant: Macronix International Co., Ltd.
Inventors: Kim Wanki

Publication number: US20160365310A1
Application number: 14/735,790

Abstract:
Provided are improved semiconductor memory devices and methods for manufacturing such semiconductor memory devices. A method may incorporate the patterning of the array and periphery regions in self-aligned quadruple patterning and provide semiconductor devices resulting from the combined patterning.

Publication date: 2016-12-15
Applicant: Macronix International Co., Ltd.
Inventors: Han Tzung-Ting

Publication number: US20160365311A1
Application number: 14/735,837

Abstract:
Provided are improved semiconductor memory devices and methods for manufacturing such semiconductor memory devices. A method may incorporate the patterning of the array and periphery regions in self-aligned double patterning and provide semiconductor devices resulting from the combined patterning.

Publication date: 2016-12-15
Applicant: Macronix International Co., Ltd.
Inventors: Han Tzung-Ting

How are Macronix International Co., Ltd.’s applications performing in USPTO?

Application Number Title Status Art Unit Examiner
15/590,014 Threshold Voltage Control Of Memory Cell Selector For Phase Change And Resistive Random Access Memory Arrays Abandoned — Failure to Respond to an Office Action 2813 Ahmad, Khaja
14/735,790 Method Of Manufacturing Semiconductor Devices With Combined Array And Periphery Patterning In Self-Aligned Quadruple Patterning Patented Case 2814 Tang, Suian
14/735,837 Method Of Manufacturing Semiconductor Devices With Combined Array And Periphery Patterning In Self-Aligned Double Patterning Abandoned — Failure to Respond to an Office Action 2814 Tang, Suian
14/457,982 Scanner And Method For Performing Exposure Process On Wafer Abandoned — Failure to Respond to an Office Action 2882 Kreutzer, Colin Wright
13/875,998 Formation Of A High Aspect Ratio Contact Hole Patented Case 2818 Huynh, Andy