Infineon Technologies Austria Ag Patent Portfolio Statistics

Infineon Technologies Austria Ag

Profile Summary

This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.

How does the overall patent portfolio of Infineon Technologies Austria Ag look like?

Assignee Art Units
Total Applications: 2,024 1,984,513
Granted Patents: 1,698 1,330,611
Grant Index 91.09% 82.9%
Abandoned/Rejected Applications: 166 (8.91%) 274,479 (17.1%)
In-Process Applications: 149 379,423
Average Grant Time: 2.48 Years 2.47 Years
Average Office Actions: 1.6 1.4

Which Technology Area Infineon Technologies Austria Ag is filing most patents in? (Last 10 years)

Art Unit Definition Total Applications
2838 Electrical Circuits and Systems 355
2842 Electrical Circuits and Systems 131
2815 Semiconductors/Memory 85
2814 Semiconductors/Memory 68
2811 Semiconductors/Memory 66

How many patents are Infineon Technologies Austria Ag filing every year?

Year Total Applications Predicted
2022 0* 739
2021 50* 696
2020 127 571
2019 124 124
2018 143
2017 150
2016 191
2015 189
2014 176
2013 215

*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published

Recently filed patent applications of Infineon Technologies Austria Ag in USPTO?

Publication number: US20220093496A1
Application number: 17/540,512

Abstract:
A semiconductor device forming a bidirectional switch includes first and second carriers, first and second semiconductor chips arranged on the first and second carriers, respectively, a first row of terminals arranged along a first side face of the carrier, a second row of terminals arranged along a second side face of the carrier opposite the first side face, and an encapsulation body encapsulating the first and second semiconductor chips. Each row of terminals includes a gate terminal, a sensing terminal and at least one power terminal of the bidirectional switch.

Publication date: 2022-03-24
Applicant: Infineon Technologies Austria Ag
Inventors: Klaus Schiess


Publication number: US20220077309A1
Application number: 17/528,313

Abstract:
A method includes forming a trench in a first surface in an edge region of a semiconductor body, forming a plurality of superjunction transistor cells in an inner region of a semiconductor body, and forming an insulation layer on the first surface of the semiconductor body in the edge region and in the inner region, wherein forming the insulation layer includes a thermal oxidation process.

Publication date: 2022-03-10
Applicant: Infineon Technologies Austria Ag
Inventors: Franz Hirler


Publication number: US20220059453A1
Application number: 17/518,098

Abstract:
A multi-voltage domain device includes a semiconductor layer including a first main surface, a second main surface arranged opposite to the first main surface, a first region including first circuity that operates in a first voltage domain, a second region including second circuity that operates in a second voltage domain different than the first voltage domain, and an isolation region that electrically isolates the first region from the second region in a lateral direction that extends parallel to the first and the second main surfaces. The isolation region includes at least one deep trench isolation barrier, each of which extends vertically from the first main surface to the second main surface. The multi-voltage domain device further includes at least one first capacitor configured to generate an electric field laterally across the isolation region between the first region and the second region.

Publication date: 2022-02-24
Applicant: Infineon Technologies Austria Ag
Inventors: Christian Neidhart Thomas


How are Infineon Technologies Austria Ag’s applications performing in USPTO?

Application Number Title Status Art Unit Examiner
17/540,512 Semiconductor Device Including A Bidirectional Switch Docketed New Case – Ready for Examination OPAP Central, Docket
17/528,313 Method For Forming An Insulation Layer In A Semiconductor Body And Transistor Device Docketed New Case – Ready for Examination OPAP Central, Docket
17/518,098 Transfering Informations Across A High Voltage Gap Using Capactive Coupling With Dti Integrated In Silicon Technology OPAP Central, Docket
17/513,344 Superjunction Transistor Device OPAP Central, Docket
17/494,209 Semiconductor Module Docketed New Case – Ready for Examination OPAP Central, Docket