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Intel Corporation Patent Portfolio Statistics

Intel Corporation

Profile Summary

This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.

How does the overall patent portfolio of Intel Corporation look like?

Total Applications: 52,570
Granted Patents: 38,855
Grant Index 81.54 %
Abandoned/Rejected Applications: 8,798 (18.46%)
In-Process Applications: 4,819
Average Grant Time: 3.25 Years
Average Office Actions: 1.97

Which Technology Area Intel Corporation is filing most patents in? (Last 10 years)

Art Unit Definition Total Applications
Opap Parked GAU 1,528
2183 Computer Architecture and I/O 1,064
2611 Computer Graphic Processing, 3D Animation, Display Color Attribute, Object Processing, Hardware and Memory 910
2181 Computer Architecture and I/O 716
2182 Computer Architecture and I/O 669

How many patents are Intel Corporation filing every year?

Year Total Applications
2022 0*
2021 797*
2020 2,129
2019 2,863
2018 3,045

*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published

Recently filed patent applications of Intel Corporation in USPTO?

Publication number: US20220030242A1

Abstract:
Provided is an encoder including: circuitry; and memory coupled to the circuitry, in which the circuitry: derives a prediction residual indicating a difference between a current block and a prediction image of the current block; performs primary transform on the prediction residual, and performs secondary transform on a result of the primary transform; performs quantization on a result of the secondary transform; and encodes a result of the quantization. In the performing of the secondary transform, when a matrix weighted intra prediction included in intra prediction and having prediction modes is used, the circuitry uses, as a transform set for the secondary transform, a common transform set shared among the prediction modes. The matrix weighted intra prediction generates the prediction image by performing matrix calculation on a pixel sequence obtained from pixel values of surrounding pixels of the current block.

Publication date: 2022-01-27
Applicant: Intel Corporation
Inventors: Kato Yusuke


Publication number: US20220030276A1

Abstract:
An encoder includes circuitry and memory. In both of a first type of residual coding where an orthogonal transform is applied to a current block and a second type of residual coding where the orthogonal transform is skipped, wherein when a number of CABAC processes is within an allowable range, the circuitry encodes coefficient information flags by CABAC, each of the coefficient information flags relating to a coefficient included in the current block; and otherwise, the circuitry skips the encoding of the coefficient information flags; and the circuitry encodes a remainder value of the coefficient with Golomb-Rice code when the coefficient information flags are encoded; and the circuitry encodes a value of the coefficient with the Golomb-Rice code when the plurality of coefficient information flags are not encoded, wherein the coefficient information flags are partially different between the first type of residual coding and the second type of residual coding.

Publication date: 2022-01-27
Applicant: Intel Corporation
Inventors: Nishi Takahiro


Publication number: US20220027357A1

Abstract:
A control method according to the present disclosure includes: receiving, from a terminal operated by a first user who is one of parties that have concluded a first contract, first transaction data that includes a first smart contract corresponding to the first contract and a first electronic signature associated with the first user; executing a consensus algorithm with a plurality of other servers; and recording a block including the first transaction data in a distributed ledger. The first smart contract includes (i) content of the first contract which is a main contract, (ii) a variable that is provisional and used for identifying a second smart contract corresponding to a second contract which is to be newly concluded as a sub contract of the first contract, and (iii) a condition for creation of the second smart contract.

Publication date: 2022-01-27
Applicant: Intel Corporation
Inventors: Hirose Yuuki


How are Intel Corporation’s applications performing in USPTO?

Application Number Title Status Art Unit Examiner
17/499,294 Encoder, Decoder, Encoding Method, And Decoding Method OPAP Central, Docket
17/499,292 Encoder, Decoder, Encoding Method, And Decoding Method OPAP Central, Docket
17/497,302 Control Method, Server, And Data Structure OPAP Central, Docket
17/497,304 Control Method, Control System, And Recording Medium OPAP Central, Docket
17/496,533 Reception Apparatus And Reception Method OPAP Central, Docket