Sony Semiconductor Solutions Corporation Patent Portfolio Statistics

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Sony Semiconductor Solutions Corporation

Profile Summary

This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.

How does the overall patent portfolio of Sony Semiconductor Solutions Corporation look like?

Assignee Art Units
Total Applications: 3,052 1,985,343
Granted Patents: 1,986 1,327,592
Grant Index 96.88% ↑ 82.61%
Abandoned/Rejected Applications: 64 (3.12%) 279,534 (17.39%)
In-Process Applications: 984 378,217
Average Grant Time: 2.51 Years ↑ 2.5 Years
Average Office Actions: 1.67 ↑ 1.42

Which Technology Area Sony Semiconductor Solutions Corporation is filing most patents in? (Last 10 years)

Art Unit Definition Total Applications
Opap Parked GAU 434
2878 Optics 151
2697 Selective Visual Display Systems 136
2696 Selective Visual Display Systems 123
2698 – 101

How many patents are Sony Semiconductor Solutions Corporation filing every year?

Year Total Applications Predicted
2022 1* 1317
2021 499* 1143
2020 519 884
2019 487 487
2018 137 –
2017 165 –
2016 124 –
2015 106 –
2014 162 –
2013 121 –

*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published

Recently filed patent applications of Sony Semiconductor Solutions Corporation in USPTO?

Publication number: None
Application number: 17/277,007

Abstract:
–

Publication date: –
Applicant: Sony Semiconductor Solutions Corporation
Inventors: Kurotori Takuya

Publication number: US20220208718A1
Application number: 17/638,083

Abstract:
In a semiconductor package in which a semiconductor element is connected to a substrate, the semiconductor element is prevented from being warped. The semiconductor package includes a substrate, the semiconductor element, a bonding portion, and protrusions. First ends of wires are connected to a front surface of the substrate. Second ends of wires are connected to one surface of opposite surfaces of the semiconductor element. The bonding portion bonds a part of the other surface of the opposite surfaces of the semiconductor element and the front surface of the substrate. The protrusions protrude from the front surface of the substrate to a remaining part of the other surface of the opposite surfaces of the semiconductor element.

Publication date: –
Applicant: Sony Semiconductor Solutions Corporation
Inventors: Otsuka Yasushi

Publication number: US20220223642A1
Application number: 17/291,184

Abstract:
The present disclosure relates to an image capturing element, a manufacturing method, and an electronic device that make it possible to improve effects of reducing crosstalk.
A trench part provided from a light-receiving surface side of a semiconductor substrate in which photoelectric conversion parts that photoelectrically convert emitted light are formed and between the plurality of photoelectric conversion parts; and a protrusion part provided with at least an inclined surface that is inclined with respect to a side surface of the trench part to widen a space of the trench part in one part of the trench part are provided. The present technology can be applied, for example, to backlit solid-state image capturing elements.

Publication date: –
Applicant: Sony Semiconductor Solutions Corporation
Inventors: Atsushi Okuyama

How are Sony Semiconductor Solutions Corporation’s applications performing in USPTO?

Application Number Title Status Art Unit Examiner
17/277,007 Semiconductor Device, Solid-State Imaging Device, And Method Of Manufacturing Semiconductor Device Docketed New Case – Ready for Examination OPAP Central, Docket
17/638,083 Semiconductor Package, Electronic Apparatus, And Method For Manufacturing Semiconductor Package Docketed New Case – Ready for Examination OPAP Central, Docket
17/291,184 Image Capturing Element, Manufacturing Method, And Electronic Device Docketed New Case – Ready for Examination OPAP Central, Docket
17/596,749 Solid-State Imaging Device And Electronic Device Docketed New Case – Ready for Examination OPAP Central, Docket
17/620,108 Semiconductor Device Docketed New Case – Ready for Examination OPAP Central, Docket