Micron Technology, Inc Patent Portfolio Statistics

Micron Technology, Inc.

Profile Summary

This article summarizes the perfomance of the assignee in the recent years. The overall statistics for this portfolio help to analyze the areas where the assignee is performing well. The filing trend, perfomance across the tech centers and the perfomance of the recent applications has been mentioned below. All the stats are calculated based on the perfomance in USPTO.

How does the overall patent portfolio of Micron Technology, Inc. look like?

Assignee Art Units
Total Applications: 32,307 1,996,311
Granted Patents: 29,233 1,334,795
Grant Index 96.66% 81.93%
Abandoned/Rejected Applications: 1,009 (3.34%) 294,349 (18.07%)
In-Process Applications: 1,959 367,167
Average Grant Time: 2.44 Years 2.53 Years
Average Office Actions: 1.64 1.43

Which Technology Area Micron Technology, Inc. is filing most patents in? (Last 10 years)

Art Unit Definition Total Applications
2824 Semiconductors/Memory 2,838
2827 Semiconductors/Memory 2,629
2818 Semiconductors/Memory 2,253
2812 Semiconductors/Memory 1,017
2813 Semiconductors/Memory 952

How many patents are Micron Technology, Inc. filing every year?

Year Total Applications Predicted
2022 0* 2470
2021 684* 2378
2020 1,444 2235
2019 1,560 1560
2018 1,827
2017 1,191
2016 701
2015 759
2014 853
2013 900

*The drop in the number of applications filed in last two years compared to previous years is because applications can take up to 18 months to get published

Recently filed patent applications of Micron Technology, Inc. in USPTO?

Publication number: US20220107907A1
Application number: 17/554,400

Abstract:
A memory module having a plurality of memory chips, at least one controller (e.g., a central processing unit or special-purpose controller), and at least one interface device configured to communicate input and output data for the memory module. The input and output data bypasses at least one processor (e.g., a central processing unit) of a computing device in which the memory module is installed. And, the at least one interface device can be configured to communicate the input and output data to at least one other memory module in the computing device. Also, the memory module can be one module in a plurality of memory modules of a memory module system.

Publication date: 2022-04-07
Applicant: Micron Technology, Inc.
Inventors: Dmitri Yudanov


Publication number: US20220108730A1
Application number: 17/555,076

Abstract:
Systems, apparatuses, and methods related to performing operations within a memory device are described. Such operations may be performed using data latched in multiple sense amplifiers that are distributed among a plurality of sense amplifiers of the memory device. For example, those sense amplifiers, among the plurality of sense amplifiers, storing data associated with the operation(s) can be determined, and the data can be selectively sent from the determined sense amplifiers to an operation unit, in which the operations are performed. The operations may be made without affecting a subsequent read command that requests data from the plurality of sense amplifiers.

Publication date: 2022-04-07
Applicant: Micron Technology, Inc.
Inventors: Honglin Sun


Publication number: US20220108746A1
Application number: 17/555,005

Abstract:
The present disclosure includes apparatuses, methods, and systems for increase of a sense current in memory. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to count a number of program operations performed on the memory cells of the memory during operation of the memory, and increase a magnitude of a current used to sense a data state of the memory cells of the memory upon the count of the number of program operations reaching a threshold count.

Publication date: 2022-04-07
Applicant: Micron Technology, Inc.
Inventors: Lu Zhongyuan


How are Micron Technology, Inc.’s applications performing in USPTO?

Application Number Title Status Art Unit Examiner
17/554,400 Memory Module With Computation Capability Docketed New Case – Ready for Examination OPAP Central, Docket
17/555,076 Apparatuses And Methods For Performing Operations Using Sense Amplifiers And Intermediary Circuitry Docketed New Case – Ready for Examination OPAP Central, Docket
17/555,005 Increase Of A Sense Current In Memory Docketed New Case – Ready for Examination OPAP Central, Docket
17/554,839 Power Management Integrated Circuit With Bleed Circuit Control Docketed New Case – Ready for Examination OPAP Central, Docket
17/552,830 Semiconductor Die With Capillary Flow Structures For Direct Chip Attachment Docketed New Case – Ready for Examination OPAP Central, Docket